Custom interconnect design complements automated route algorithms which do not guarantee the
generation of robust, legal routes for all signals in a ULSI design. Because of the complexity of the
route problem in ULSI designs, multiple route solutions are possible, some solutions are more efficient than others, and there is a need for statistical tools to determine whether a designer is following an efficient path. This paper is the second in a series on physical design of on-chip interconnections, and in this paper, we present a statistical framework to quantify the quality of custom interconnections and to optimize physical properties of interconnections in a design. The analytical techniques presented in this series of papers can also be incorporated in semi-custom and ASIC designs and may serve as tools to evaluate and improve various route algorithms.
By: Mary Y. L. Wisniewski, Emmanuel Yashchin, Robert L. Franch, David Conrady, Giovanni Fiorenza, I. Cevdet Noyan
Published in: RC22344 in 2002
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