This paper describes FPgen, a test-program generator for datapath verification of floating-point units in microprocessors. FPgen is a convenient and powerful platform for generating interesting data combinations for floating-point instruction operands. Its main purpose is to provide a means to fulfill floating-point test-plans which typically include a myriad of tasks that stem from both the architecture and the micro-architecture. FPgen focuses on the IEEE standard definitions and therefore supports architectures that comply with these definitions.
By: Laurent Fournier and Sigal Asaf
Published in: H-0140 in 2002
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