In the early years of digital system design, it was sufficient to model the delay of elements, so digital simulation tools used step functions to represent signals. As switching speeds increased, it became increasingly necessary to take into account the transition time of the signal. The simplest way of modeling the transition time is to upgrade the signal model from a step to a ramp, and this has been the state of digital design since the early eighties [1, 2]. As speeds increase further, however, the limitation of this approximation have become increasingly apparent. One well known problem is that of threshold selection, which when not done properly can lead to to negative delays [3, 4]. Also, many of the deep-submicron phenomena (e.g. inductive interconnect, coupled noise, and power supply current) are difficult or impossible to model accurately with the ramp model. In this paper, we develop the mathematical basis for a new approach to modeling the waveforms associated with digital circuits. The approach represents a logical extension to current waveform
modeling methods and provides a straightforward method to quantify and increase the accuracy of waveform models.
By: Sani Nassif, Emrah Acar
Published in: RC22709 in 2003
LIMITED DISTRIBUTION NOTICE:
This Research Report is available. This report has been submitted for publication outside of IBM and will probably be copyrighted if accepted for publication. It has been issued as a Research Report for early dissemination of its contents. In view of the transfer of copyright to the outside publisher, its distribution outside of IBM prior to publication should be limited to peer communications and specific requests. After outside publication, requests should be filled only by reprints or legally obtained copies of the article (e.g., payment of royalties). I have read and understand this notice and am a member of the scientific community outside or inside of IBM seeking a single copy only.
Questions about this service can be mailed to reports@us.ibm.com .