Electromigration and Stress-Induced Voiding in Fine Al(Cu) Lines

The physical variables underlying metallization failure due to electromigration and stress-induced voiding in integrated circuit on chip interconnects are examined in the context of accelerated testing methods, and structures. The role of single-level versus multi-level test structures, mass transport, and short length effect are considered. Aspects of metallization grain size, crystallographic texture, alloying elements, Al2Cu precipitate distribution, and electromigration induced vacancy wind known to influence mass transport are also examined.