Full System Binary Translation: RISC to VLIW

We describe our experiences with DAISY (Dynamically Architected Instruction Set from Yorktown). DAISY dynamically translates code for a RISC processor into code for an underlying VLIW processor. This translation is done piecewise --when a fragment of code is first encountered for execution, it is translated into code for the underlying VLIW machine and saved. This translation process begins with firmware executed by the RISC processor at boot time, continues through a full operating system boot, user login, and X-Windows, under which a variety of applications are run. The translated code is executed under simulation thus guaranteeing the correctness of the whole process. In executing this translated code, numerous "difficult" situations emerge:

• Support of precise exceptions for the RISC processor in VLIW code that is drastically reordered. Such exceptions include page faults, alignment exceptions, and protection violations.
• Support for virtual address translation.
• Ability to deal with raw I/O devices such as networks, keyboards, and graphics adapters. These devices impose not only a semi-realtime requirement, but care must also be taken that reads and writes to I/O locations are not cached. Speculative accesses to I/O locations must be quashed.
  This paper describes the novel ways in which DAISY deals with these and other difficulties, and presents some preliminary statistics measuring the effectiveness of full binary translation.