Fabrication of Silicon-on-Insulator (SOI) and Strain-Silicon-on-Insulator (sSOI) Wafers Using Ion Implantation

CMOS devices fabricated on silicon-on-insulator (SOI) substrates are the key drivers for increased chip speed, lower voltage operation and increased resistance to cosmic ray induced ‘soft error” events. Further device performance is achieved when a SOI layer is strained either locally or globally in tensile or compressive state. The most economical method to form SOI and sSOI of less than 200 nm for commercial applications, rely on oxygen implantation at elevated temperatures followed by > 1300o C anneal. This method is known as SIMOX (Separation by IMplantation of Oxygen). Other methods to form SOI and sSOI wafers typically use a “layer transfer” process, where high dose implants of light ions are used, either alone or in combination with other processes, to form a weakened layer which is split off from a “donor” wafer. The “donated” layer of Si or strained-Si, is typically combined with an insulator layer, is bonded to a “handle” Si wafer, forming the final SOI or sSOI wafer. This chapter will describe these implantation methods and some of the applications of SOI and sSOI for advanced electronic and photonic devices.

By: Devendra K. Sadana, Michael I. Current

Published in: RC23992 in 2006


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