Methodology to Simulate Delta-I Noise Interaction with Interconnect Noise for Wide, On-chip Data-buses Using Lossy Transmission-line Power-blocks

A new technique is described for reducing computational complexity and improve accuracy of power distribution and interconnect noise prediction for wide, on-chip data-buses. The methodology uses lossy transmission-line power-blocks with frequency-dependent properties needed for the multi-GHz clock frequencies. The interaction between delta-I noise, common-mode noise, and crosstalk is illustrated with simulations using representative driver and receiver circuits and on-chip interconnections.

By: A. Deutsch, H. H. Smith, B. J. Rubin, B. L. Krauter, G. V. Kopcsay

Published in: Electrical Performance of Electronic Packaging. Piscataway, NJ, , IEEE. , p.295-8 in 2004

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