Epitaxial silicon-on -sappire (SOS) has microtwin densities in the 105-106 cm-2 range resulting in an equal density of large facated pits on UHV/CVD-grown SiGe p-MODFET wafers. Although individual devices have been fabricated and tested on such wafers, the high density of pits makes these substrates unsuitable for integrated circuits. Additionally, it is necessary to first grow a strain-relaxed SiGe buffer layer (1-2 micrometers-thick) underneath the active device layers reducing the advantages of using a sapphire substrate. Therefore wafer bonding methods are being investigated to achieve high quality Si and SiGe-on sappire substrates for these devices. A collaboration has been established between IBM and Prof. Tom Kuech at the University of Wisconsin (UW) for these investigations.
By: P. M. Mooney, J. A. Ott, J. O. Chu, D. Canaperi
Published in: RC21892 in 2001
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