New Methodology for Combined Simulation of Delta-I Noise Interaction with Interconnect Noise for Wide, On-chip Data-buses Using Lossy Transmission-line Power-blocks

Copyright © (2006) by IEEE. Permission to make digital or hard copies of part or all of this work for personal or classroom use is granted without fee provided that copies are not made or distrubuted for profit. To copy otherwise, to republish, to post on servers, or to redistribute to lists, requires prior specific permission and/or a fee.

A new technique is described for reducing computational complexity and improving accuracy of combined power distribution and interconnect noise prediction for wide, on-chip data-buses. The methodology uses lossy transmission-line power-blocks with frequency-dependent properties needed for the multi-GHz clock frequencies. The interaction between delta-I noise, common-mode noise, and crosstalk and their effect on timing is illustrated with simulations using representative driver and receiver circuits and on-chip interconnections.

By: A. Deutsch; H. H. Smith; B. J. Rubin; B. L. Krauter; G. V. Kopcsay

Published in: IEEE Transactions on Advanced Packaging, volume 29, (no 1), pages 11-20 in 2006


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