Low Cost FCA/BGA Single Chip Carriers

Area array packages such as Ball Grid Array (BGA) have signficant advantages over peripheral leaded packages in the areas of ease of assembly, test, and package footprint for high I/O chips. One of the challenges to widespread acceptance of BGA in the electronics industry is its current cost premium. This premium exists because of the expense associated with the multi-level ceramic technology used for the initial implementations of BGA modules. Recently, alternative paths for the implementation of BGA packages have been explored, notably the OMPAC style package for wire-bonded chips which uses printed circuit board technology to fabricate the BGA module. As the chip I/O count increases, there are advantages in migrating from the use of wire bond technology to area array flip chip attach (FCA). The packaging of high I/O FCA devices on laminate substrates is a challenge because of the wireability needed to escape the fine-pitched C4 pad array. An assessment of the options for laminate FCA/BGA packaging of PowerPC chips such as the 601 and 604 has led to the conclusion that substrate costs comparable to QFP packages are attainable. This study was carried out in a typical printed circuit board manufacturing environment. The key enablers in this demonstration will be discussed, including the wireability requirements and other challenges in the area of assembly.

By: H. R. Bickford, C. R. Davis, R. S. Germain and R. D. Goldblatt

Published in: RC19974 in 1995


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