Interface State Generation in pFETs with Ultra-Thin Oxide and Oxynitride on (100) and (110) Si Substrates

In recent years the importance of the negative-biastemperature instability (NBTI) in pFETs has been highlighted for its practical implications in scaled CMOS as well as for the interesting physical phenomena involved. In this paper we use a variety of electrical measurements including gated diode and stress-induced leakage as well as conventional I-V characteristics to explore the characteristics of interface state generation under negative bias stress in a variety of oxide and oxynitride pFETs on both (100) and (110) surfaces.

By: J. H. Stathis; R. Bolam; M. Yang; T. B. Hook; A. Chou; G. Larosa

Published in: Microelectronic Engineering, volume 80, (no ), pages 126-9 in 2005

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