Advanced CMOS nodes target high-performance at lower supply voltage. High-mobility III-V channel materials have the potential to meet this target. Although III-V materials such as InGaAs are beneficial for nFET channels, SiGe (or Ge) provides better hole mobility and is more suited for pFET channels. Therefore, a InGaAs/SiGe hybrid CMOS technology is being pursued for scaled nodes. There are significant challenges to co-integrate these two materials in a scalable process. In this regard, here, we present some of our recent work in InGaAs/SiGe CMOS integration through a novel direct epitaxy process for coplanar 2D integration. We also show our efforts in 3D monolithic integration of InGaAs-on-SiGe for CMOS and beyond.
By: V. Deshpande, H. Hahn, V. Djara, E. O’Connor, D. Caimi, M. Sousa, J. Fompeyrine and L. Czornomaz
Published in: Proc. 47th European Solid-State Device Research Con-ference (ESSDERC 2017) , IEEE, p.10.1109/ESSDERC.2017.8066637 in 2017
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