Towards electro-optical integration of hybrid III-V on Si lasers into the BEOL of a CMOS technology

Interconnects have become a severe bottleneck in today's computing hardware To improve the interconnectivity, the bandwidth per area on a chip-to-chip or even core-to-core level has to be increased. Si photonics (SiPh) is the ideal technology to increase the bandwidth density. By using shallow CMOS-compatible hybrid III-V on Si lasers, we show a concept for which SiPh and CMOS share a common BEOL. Epitaxial layer optimization, low-resistive ohmic contacts, optimized dry etch, current blocking layer formation and optically pumped lasers with feedback to the Si waveguide buried below are shown.

By: H. Hahn, M. Seifried, G. Villares, Y. Baumgartner, M. Halter, C. Caër, D. Caimi, M. Sousa, R. Dangel, N. Meier, F. Horst, L. Czornomaz, B. J. Offrein

Published in: 2017 75th Annual Device Research Conference (DRC), IEEE, p. in 2017


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