Technologies and Building Blocks for Fast Packet Forwarding

Copyright [©] (2001) by IEEE. Permission to make digital or hard copies of part or all of this work for personal or classroom use is granted without fee provided that copies are not made or distrubuted for profit. To copy otherwise, to republish, to post on servers, or to redistribute to lists, requires prior specific permission and/or a fee.

We provide a review of the state of the art and the future of packet processing and switching. The industry's response to the need for wire-speed packet-processing devices whose function can be rapidly adapted to continuously changing standards and customer requirements is the concept of special programmable "network processors". We discuss the prerequisites of processing tens to hundreds of millions of packets per second and indicate ways to achieve scalability through parallel packet processing. Tomorrow's switch fabrics, which will provide node-internal connectivity between the input and output ports of a router or switch, will have to sustain Terabit-per-second throughput. After reviewing fundamental switching concepts, we discuss architectural and design issues that must be addressed to allow the evolution of packet switch fabrics to Terabit-per-second throughput performance.

By: W. Bux, W. Denzel, A.P.J. Engbersen, A. Herkersdorf, R. Luijten

Published in: IEEE Communications Magazine, volume 39, (no 1), pages 70-7 in 2001

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