Interfacial layers between the high-k dielectric and Si surface play a very important role to achieve the high electron mobilities required in the next generations of CMOS technologies. W/HfO2 gate stacks formed on SiO2/SiON interfacial layers subjected to various process conditions were characterized by electrical measurements such as electron mobility, inversion layer thickness and leakage reduction with respect to standard SiO2 technology. The required high electron mobilities were obtained only when the W/HfO2 gate stack was annealed at high temperature. Electrical data and physical analysis of the stack suggest intermixing of the HfO2 with the interfacial layer and formation of a silicate layer which may lessen the effects of phonon scattering. Densification of the interfacial layer by spike annealing or interfacial layer stabilization by nitrogen plasma inhibits such reactions and lower electron mobilities were obtained. Also, no electrical performance advantages are seen by thinning the HfO2 down to 1.5nm.
By: A. Callegari; P. Jamison; D. Neumayer; F. McFeely; J. Shepard; W. Andreoni; A. Curioni; C. Pignedoli
Published in: RC23700 in 2005
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