Investigation of InAs/GaSb tunnel diodes on SOI

Tunnel diodes are of interest to gain insights into the limitations of tunnel field effect transistors (TFETs) as they enable us to distinguish effects of the heterojunction from device parasitics found in a three terminal device. In the present work, we report on InAs/GaSb nanowire heterojunction tunnel diodes monolithically integrated on silicon-on-insulator substrate (SOI). The nanowires were grown using template-assisted selective epitaxy (TASE). Temperature dependent I-V measurements show a change in the conductance slope due to the presence of defects at the heterojunction. Comparison with TFETs results shows a similar temperature dependence of the slope, but with smaller absolute values. We further performed room temperature pulsed I-V measurements on the same diodes to analyze trap contributions and we observed no significant dependence on pulse time down to 10µs.

By: C. Convertino, D. Cutaia, H. Schmid, N. Bologna, P. Paletti, A.M. Ionescu, H. Riel, K. E. Moselund

Published in: 2017 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS), IEEE, p.10.1109/ULIS.2017.7962586 in 2017

LIMITED DISTRIBUTION NOTICE:

This Research Report is available. This report has been submitted for publication outside of IBM and will probably be copyrighted if accepted for publication. It has been issued as a Research Report for early dissemination of its contents. In view of the transfer of copyright to the outside publisher, its distribution outside of IBM prior to publication should be limited to peer communications and specific requests. After outside publication, requests should be filled only by reprints or legally obtained copies of the article (e.g., payment of royalties). I have read and understand this notice and am a member of the scientific community outside or inside of IBM seeking a single copy only.

RZ3927.pdf

Questions about this service can be mailed to reports@us.ibm.com .