10+ Gb/s 90nm CMOS Serial Link Demo in CBGA Package

We report a 10+ Gb/s serial link demo chip in 90-nm CMOS. It consists of a full-rate 4:1 MUX with 8-tap feed-forward equalizer, a half-rate 1:4 DEMUX with programmable peaking pre-amplifier, and a parallel port interface. The chip is housed in CBGA package and uses ESD devices on all pins. The measured maximum speed of stand-alone transmitter and receiver was 11.7 Gb/s and 13.3 Gb/s respectively, and maximum back-to-back operation speed (transmitter+receiver) was 11.4 Gb/s.

By: Sergey Rylov, Scott Reynolds, Daniel Storaska, Brian Floyd, Mohit Kapur, Thomas Zwick, Sudhir Gowda, Michael Sorna

Published in: Proceedings of the IEEE 2004 Custom Integrated Circuits Conference. Piscataway, NJ, , IEEE. , p.27-30 in 2004

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