A Multithreaded Processor Architecture with Implicit Granularity Adaptation

We propose a multithreaded processor architecture for mapping a potentially unbounded number of software threads into a bounded number of hardware threads. Our architecture degrades a fork instruction gracefully into a function call when all hardware threads are in use, thereby adjusting thread granularity implicitly. This new architectural feature improves programmability by allowing programs to expose as much parallelism as is inherent in an application without incurring a performance penalty due to excess parallelism.

By: Volker Strumpen

Published in: RC24184 in 2007

LIMITED DISTRIBUTION NOTICE:

This Research Report is available. This report has been submitted for publication outside of IBM and will probably be copyrighted if accepted for publication. It has been issued as a Research Report for early dissemination of its contents. In view of the transfer of copyright to the outside publisher, its distribution outside of IBM prior to publication should be limited to peer communications and specific requests. After outside publication, requests should be filled only by reprints or legally obtained copies of the article (e.g., payment of royalties). I have read and understand this notice and am a member of the scientific community outside or inside of IBM seeking a single copy only.

rc24184.pdf

Questions about this service can be mailed to reports@us.ibm.com .