A 6-bit, 1.6-GSample/s CMOS Flash Converter for Multi-Gigabit Wireless Communication

A 150-mW, 6-bit, 1.6-gigasample/second (GS/s) flash converter in 0.13-um CMOS technology is described. The analog section uses an input track-and-hold and comparator preamps with resistive output averaging for > 5.5 ENOB un-calibrated performance up to 1.6-GS/s with DC input. The digital section, designed using standard cells, contains a one to four deserializer, bubble error correction circuit, on-chip storage of thermometer data and 128 6-bit binary samples for off-chip FFT computation. A three wire serial interface is used to configure the part and read data stored on-chip. A 6-bit 16 to 1 decimated output is also provided for spectral study.

By: Mohit Kapur; Vincent W. Leung; Scott K. Reynolds; Daniel M. Kuchta; Christian W. Baks

Published in: RC23933 in 2006

LIMITED DISTRIBUTION NOTICE:

This Research Report is available. This report has been submitted for publication outside of IBM and will probably be copyrighted if accepted for publication. It has been issued as a Research Report for early dissemination of its contents. In view of the transfer of copyright to the outside publisher, its distribution outside of IBM prior to publication should be limited to peer communications and specific requests. After outside publication, requests should be filled only by reprints or legally obtained copies of the article (e.g., payment of royalties). I have read and understand this notice and am a member of the scientific community outside or inside of IBM seeking a single copy only.

rc23933.pdf

Questions about this service can be mailed to reports@us.ibm.com .