The double gated FET (DGFET), in which current may or may not flow close to either gate, exhibits complex behavior as a function of voltages applied to either gate and to the drain. This behavior is explored and analytical models derived to simulate drain current, capacitances and the short-channel effect under arbitrary bias conditions. A truncated hyperbolic velocity vs. field model has been used to model the linear region, and the space charge region has been modeled using a modified Suzuki scale length. The channel configuration in a DGFET may change, along the length of the FET, from dual to single due to the increasing channel potential, and this is simulated by modeling the transistor as two FETs in series giving rise to the name "mixed-mode" model. Short channel effects are simulated by introducing an equivalent short-channel charge which simulates a bias and electrode dependence short channel effect. The model has been implemented as FORTRAN subroutines and ASX simulations give realistic results withreasonable running times of 30ms/point on a 355MHz RS6000 computer.
By: P. M. Solomon
Published in: RC21956 in 2001
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