Technology and Device Scaling Considerations for CMOS Imagers

        This paper presents an analysis of the impact of device and technology scaling on active pixel CMOS image sensors. Using the SIA roadmap as a guideline, we calculate the device characteristics that are germane to the image sensing performance of CMOS imagers, and highlight the areas where the CMOS imager technology may need to depart from ``standard'' CMOS technologies. The impact of scaling on those analog circuit performance that pertain to image sensing performances are analyzed. Our analyses suggest that while ``standard'' CMOS technologies may provide adequate imaging performance at the 2 - 1 $\mu m$ generation without {\underline {\em any}} process change, some modifications to the fabrication process and innovations of the pixel architecture are needed to enable CMOS to perform good quality imaging at the 0.5 $\mu m$ technology generation and beyond. Finally, the challenges to the CMOS imager research community are outlined.

By: Hon-Sum Philip Wong

Published in: RC20387 in 1996

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