This paper presents a single-chip, all-CMOS solution for 4 times OC-3c, OC-12 and OC-12c SDH/SONET framing with integrated serial line interfaces. Outstanding features of this chip are clock and data recovery and fulfillment of ITU-T and Bellcore jitter requirements for SDH/SONET systems, as well as the large range of functions offered. These functions include ATM and PPP support, as well as built-in native SDH/SONET functions such as digital cross-connect, add/drop multiplexing and automatic protection switching. In addition, the chip is based on a new scalable modular architecture.
Keywords: SONET, SDH, framer, clock recovery, PLL.
By: Peter Baechtold, Michael Beakes, Peter Buchmann, Rolf Clauberg, John F. Ewen, John F. Gilsdorf, Philippe Hauviller, Andreas Herkersdorf, Jean-Claude Le Garrec, Wolfram Lemppenau, Ben Parker, Dale J. Pearson, Joseph M. Pereira, Dominique Plassat, Scott K. Reynolds, Hans R. Schindler, André Steimle, David J. Webb, Albert X. Widmer
Published in: RZ3222 in 2001
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