Work continued on the processing of the divider circuit being fabricated on our
standard pMODFET layer structure on bulk Si substrates. A set of 4 wafers from the
GOVT61 UHVCVD growth run is being processed, with the second wafer a few steps
behind the first wafer, and so forth. In November 2001 we reported DC characteristics for
individual devices on the first wafer, for which all the fabrication steps through metal 1
had been completed successfully. Unfortunately, this wafer was broken during the final
fabrication step to connect the devices in the divider circuit (metal 2). Therefore, further
measurements on this wafer were not possible.
By: P. M. Mooney, J. O. Chu, D. V. Singh, S. J. Koester, A. Grill, V. V. Patel, J. A. Ott
Published in: RC22343 in 2002
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