A 40 Gb/s Optical Receiver for Short-Distance High-Density Interconnects in 80-nm CMOS

An optical receiver for short-range optical data communication up to 40 Gb/s is presented. The optimum number of limiting amplifier (LA) stages is calculated to achieve a large gain-bandwidth product. The receiver features an electrical transimpedance gain of 91.4 dBO and a bandwidth of 19.2 GHz. For the free-space optical measurements (λ = 1550nm) an InGaAs/InP photo diode (PD) and the CMOS receiver chip were placed and bonded on a test substrate. At 40 Gb/s an open eye at the output of the receiver is shown at an optical input power of -4.6 dBm. Including the transmitter non-idealities, sensitivities at 20 Gb/s and 30 Gb/s of –8.2 dBm and –7.5 dBm, respectively, at a BER = 10-12 were measured. The complete receiver consumes 56 mW from a 1.1-V supply and occupies a chip area of 230 µm × 220 µm only.

By: Christian Kromer; G. Sialm; D. Erni; H. Jaeckel; Thomas Morf; Marcel A. Kossel

Published in: Proc. IEEE Asian Solid-State Circuit Conf. "ASSCC," Hangzhou, China, IEEE, p.395 in 2006

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