A computer processing architecture with fine grain, programmable mandatory access control implemented in the processor hardware is presented. In this processing architecture, all processing contexts and all data are labeled. Depending on the instruction, and labels for the subjects and objects, the hardware enforces a loadable mandatory policy which specifies if the instruction is allowed access to the objects, and if so, also applies rules which may modify the context and output data labels.
By: W. Eric Hall, Guerney D. H. Hunt, Paul A. Karger, Mark F. Mergen, David R. Safford, David C. Toll
Published in: RC25155 in 2011
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