Evaluation of CMOS Gate Metal Materials Using In Situ Characterization Techniques

We present an evaluation of the thermal stability for various elemental metals and binary/ternary conducting compounds on gate dielectrics. The continued scaling of poly-silicon gated complementary metal oxide semiconductor (CMOS) devices may face limitations such as polydepletion, incompatibility with some high-k dielectrics, high series resistance, and boron penetration. In this study, twenty-four different elemental metals and metallic compounds with work functions ranging from 4.0 to 5.2 eV covering nFET, mid gap and pFET gate electrodes were examined. The films were characterized during rapid thermal annealing (RTA) in a forming gas (FG) ambient up to 1000 oC. Three techniques, in situ x-ray diffraction (XRD), resistance and elastic light scattering analysis were used simultaneously during annealing. It was found that many of the elemental materials, especially those with nFET work functions, undergo reactions with the SiO2 and Al2O3 gate dielectrics while others became unstable because of melting (Al) or agglomeration (Co, Ni, Pd and CoSi2). Two binary compounds, W2N and RuO2, underwent dissociation in the hydrogen containing ambient. Materials stable above 700 oC include Mo, W, Re, Ru, Co, Rh, Ir, Pd, Pt, W2N, TaN, TaSiN and CoSi2 making them possible choices for integration involving higher temperature processing.

By: C. Cabral, Jr., C. Lavoie, A. S. Ozcan, R. S. Amos, V. Narayanan, E. P. Gusev, J. L. Jordan-Sweet, J. M. E. Harper

Published in: RC23046 in 2003


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