Sub-40nm SOI V-groove n-MOSFETs

Copyright [©] (2002) by IEEE. Permission to make digital or hard copies of part or all of this work for personal or classroom use is granted without fee provided that copies are not made or distrubuted for profit. To copy otherwise, to republish, to post on servers, or to redistribute to lists, requires prior specific permission and/or a fee.

We present output and transfer characteristics of single-gated, 36nm, 46nm and 56nm channel length SOI MOSFETs with a V-groove design. For the shortest devices we nd transconductances as high as 900S/m and drive currents of 490A/m at Vgs-Vth = 0.6V. The V- groove approach combines the advantages of a controlled, extremely abrupt doping pro le between the highly doped source/drain and the undoped channel region with an excellent suppression of short-channel e ects. In addition, our
V-groove design has the potential of synthesizing devices in the 10nm range.

By: Joerg Appenzeller, Richard Martel, Phaedon Avouris, Paul M. Solomon, Joachim Knoch, Joerg Scholvin, Jesus del Alamo, Philip M. Rice

Published in: IEEE Electron Device Letters, volume 23, (no 2), pages 100-2 in 2002

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RC22177.pdf

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