SANLight: A Programmable Cellular Platform for Next Generation Storage Networking

A highly versatile network processor architecture is discussed for implementing a variety of host bus adapter and network interface controller functions for next generation storage networks, such as 10 Gb/s Fibre Channel, 10 Gb/s Ethernet, iSCSI, Infiniband, etc. The approach is based on the BlueGene/Cyclops cellular architecture and involves the system-on-a-chip integration of many simple general purpose processor cores, shared I-caches, multiple banks of embedded memory, and network interfaces connected through a high-performance on-chip crossbar switch. Most of the protocol functions can be written in C language for execution on the processors, while a small number of highly time-critical functions are implemented via hardware assists. The combination of high aggregate processing power and massive bandwidth to the on-chip memory storing programs, connection information, and packet data provides a
very high performance multiprotocol processing capability. Simulations show that fewer than 16 processors operating at 500 MHz can easily handle 10 Gb/s protocol conversion traffic at line speed. Chips with larger numbers of processors may be used for higher line speeds, or for the implementation of more complex networking functions.