Scalable Protocol Engine for High-Bandwidth Communications

        In this paper, we examine the criteria of designing a protocol engine for high-bandwidth communications, and derive the location of the boundary between dedicated hardware and a generic general-purpose processor as a function of the required performance. The design and implementation of a Fibre Channel protocol engine using both customized CMOS and embedded processors is used as an example to illustrate these design considerations.

By: Christos J. Georgiou and Chung-Sheng Li

Published in: RC20630 in 1996

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rc20630i.pdf

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