The performance of a near-midgap metal/high-κ gate stack for low-power applications is compared to that of a polysilicon/oxynitride gate stack using mixed-mode simulations. Realistic gate insulator stacks having leakages which are a small fraction of the source-drain leakage are used. In the first part of the study, the gate lengths are chosen based on fixed DIBL, and the performance of metal gate stacks is found to significantly exceed that of polysilicon gate stacks for low-power applications, but with poorer rolloff due to lower halo doping. In the second part of the study, the metal gate stack is allowed to have a longer gate length in order to match the rolloff of the polysilicon gate stack. In this case the impact of the longer gate length on performance is found to be surprisingly weak. The metal gate stack is found to have a performance advantage even when the effect of mobility degradation due to the high-κ stack is included. Finally, an ultralow power case is considered, where the lower halo doping of the metal gate stack leads to lower junction leakage.
By: Arvind Kumar; Paul M. Solomon
Published in: RC24008 in 2006
LIMITED DISTRIBUTION NOTICE:
This Research Report is available. This report has been submitted for publication outside of IBM and will probably be copyrighted if accepted for publication. It has been issued as a Research Report for early dissemination of its contents. In view of the transfer of copyright to the outside publisher, its distribution outside of IBM prior to publication should be limited to peer communications and specific requests. After outside publication, requests should be filled only by reprints or legally obtained copies of the article (e.g., payment of royalties). I have read and understand this notice and am a member of the scientific community outside or inside of IBM seeking a single copy only.
Questions about this service can be mailed to reports@us.ibm.com .