Architecture and Implementation of an MMU on a Server-Class Infiniband HCA

IBM's System z® and System p® servers use Infiniband® for IO, clustering, and coupling. The recent families z10TM and POWER6TM use several chips in common, including a second-generation two-port Double Data Rate (DDR) 12x Infiniband Host Channel Adapter(HCA). This chip is manufactured in 90-nm technology and implements the InfiniBand standard and a proprietary protocol fully in hardware. The required address translation is implemented in an on-chip Memory Management Unit (MMU). The architecture, logic design, and verification of this unit are described in this paper.
Keywords: Doring, Döring
This paper has been published in: Proc. PARS Workshop 2009, Parsberg, Germany, PARS Mitteilungen Nr. 14, (Gesellschaft für Informatik e.V December 2009), 58-66

By: A. Doering

Published in: RZ3759 in 2009


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