This paper presents the architectural concepts behind a scalable VLSI device that maps ATM, IP, and/or traditional T1/T3 traffic streams into SONET/SDH transport signals ranging from OC-1 to OC-48/STM-16. Additional key features for effective system integration are on-chip support for add-drop multiplex, digital cross-connect, and automatic protection switching functions.
By: A. Herkersdorf, W. Lemppenau and H.R. Schindler
Published in: Proceedings 2000 International Zurich Seminar on Broadband Communications. Accessing, Transmission, Networking, Piscataway, IEEE, p.191-8 in 2000
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