Operation of a novel negative differential conductance transistor fabricated in a strained Si quantum well

        The operation of a negative differential conductance (NDC) transistor fabricated on a high-mobility Si/Si1-xGex heterostructure wafer is described. The drain characteristic of this device shows a large NDC with current peak-to-valley ratios as high as 600 (100) at T=0.4K (T=1.3K). The NDC can be modulated over a wide range of current levels by either of two separately-contacted gate electrodes. The device shows bistable switching behavior in both current-and voltage-controlled circuit configurations. The novel operating principle of this transistor is described, along with its potential for future logic and memory applications.

By: S. J. Koester, K. Ismail, K. Y. Lee and J. O. Chu

Published in: RC20758 in 1997

This Research Report is not available electronically. Please request a copy from the contact listed below. IBM employees should contact ITIRC for a copy.

Questions about this service can be mailed to reports@us.ibm.com .